IC DISABLING CIRCUIT

摘要

Systems and methods for disabling a secure Integrated Circuit (IC) are provided. In general, in response to detecting an event such as an intrusion on the secure IC, a supply voltage (VDD) node of the secure IC is clamped to, or effectively short circuited to, a reference voltage (Vss) node of the secure IC. The disabling of the secure IC may be temporary or permanent. In one embodiment, the disabling of the secure IC is made permanent by setting a state of a non-volatile memory element on the secure IC. In one embodiment, the non-volatile memory element is a thin gate transistor, wherein a thin gate oxide of the thin gate transistor is blown such that the thin gate transistor operates as a fuse.