| 摘要 |
PROBLEM TO BE SOLVED: To provide a cache memory system preventing useless memory access in parallel computers. SOLUTION: The cache memory system individually connected to each of a plurality of arithmetic units that carry out parallel processing, includes a data array that has a plurality of blocks; a storage means for storing an address group of a shared memory corresponding to a block that stores data in at least one of words; a writing means that, when an address from the arithmetic unit is not in the storage means in a writing time, allocates any of the blocks as a block for writing, associates any word in that block for writing with the address, and writes the data from the arithmetic unit into the word; a word state storage means for storing word state information for specifying the word, into which the data from the arithmetic unit is written, in association with an address that corresponds to the word; and a data transfer means that refers to the word state storage means and performs write-back of data in the word, into which the data is written within the block for writing, to a corresponding block in the shared memory. COPYRIGHT: (C)2009,JPO&INPIT
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