| 摘要 |
<p>A method of increasing chip luminous efficiency, which increases luminous efficiency by forming a pattern on the sapphire substrate, said pattern being columns of a diameter of 1~10µm or a cambered surface with an underside diameter of 1~10µm, uniformly arranged to form said pattern, column height being 0.5~3µm, or cambered surface height being 0.5~5µm. The method can increase luminous efficiency by more than 40%. A manufacturing method for column patterned sapphire substrate, including the steps: photolithography - masking - peeling off of mask layer - etching - etching of metal mask layer, and a manufacturing method for a cambered surface patterned sapphire substrate, including the steps: photolithography - ICP etching.</p> |
