DELAY MONITOR CIRCUIT AND DELAY MONITOR METHOD

摘要

Provided is a delay monitor circuit which solves a problem of requiring a different critical path delay circuit for each semiconductor integrated circuit. A base delay ring section (2) oscillates an input signal (Data), and generates an input signal (Data) having frequency characteristics corresponding to design information of the semiconductor integrated circuit. A counter section (3) counts output signals outputted from the basic delay ring section (2), and judges whether the count value is larger than a reference value or not. When the count value is larger than the reference value, the counter section (3) outputs an internal signal. An evaluation section evaluates a delay time of the semiconductor integrated circuit, based on the internal signal outputted from the counter section (3).