A PHASE LOCKED LOOP

摘要

A phase locked loop circuit comprising; a digitally controlled oscillator configured to receive a first signal and output a second signal dependent on the first signal and at least one mapping function; a phase comparator configured to receive the second signal and output a third signal dependent on the second signal, a reference signal and at least one phase comparator parameter; a loop filter configured to receive the third signal and generate the first signal dependent on the third signal and at least one filter parameter; and a controller configured to control at least one of: the at least one mapping function; the at least one phase comparator parameter; and the at least one filter parameter.