发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit in which at least one memory circuit inside a RAM or the like can be relieved and integration degree is improved. SOLUTION: An encode circuit 3 receives fault bit data fail [0] to fail [7], encodes fault bit data fail [7:0] of these 8 bits, and outputs successively decoded data ef [3:0] of 4 bits (the number of compressed bits). Various fault information about a RAM 1 can be indicated by this encoded data ef [3:0]. A capture circuit 4 latches the encoded data ef [3:0] satisfying the prescribed latch condition as latch data cf [3:0]. The capture circuit 4 can perform serial shift operation of the latch data cf [3:0], and can output the latch data cf [3:0] serially as serial data output So. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009146487(A) 申请公布日期 2009.07.02
申请号 JP20070320981 申请日期 2007.12.12
申请人 RENESAS TECHNOLOGY CORP 发明人 MAENO HIDESHI;UCHIDA WATARU;NAKAO MICHINOBU;SAITO TATSUYA;SERIZAWA MITSUO
分类号 G11C29/40;G11C11/413;G11C29/02;G11C29/12 主分类号 G11C29/40
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