| 摘要 |
A semiconductor device is fabricated having a stack gate structure where a first gate electrode, a second gate electrode and a gate hard mask are stacked. The stack gate structure secures a contact open margin while reducing a loss of the gate hard mask during a self-aligned contact (SAC) etching process of forming a landing plug contact. An intermediate connection layer is formed in a landing plug contact region between the first gate electrodes. Furthermore, the occurrence of a bridge between a gate and a contact can be prevented while forming the landing plug contact. A conductive material is filled into a gate region including a recess between intermediate connection layers to form the first gate electrode. The second gate electrode and the gate hard mask are formed during a gate-patterning process using a gate mask, even though misalignment occurs between the gate and the contact.
|
