发明名称 One transistor/one capacitor dynamic random access memory (1T/1C DRAM) cell
摘要 In general, in one aspect, a method includes forming a semiconductor fin. A first insulating layer is formed adjacent to the semiconductor fin. A second insulating layer is formed over the first insulating layer and the semiconductor fin. A first trench is formed in the second insulating layer and the first insulating layer therebelow. The first trench is filed with a polymer. A third insulating layer is formed over the polymer. A second trench is formed in the third insulating layer, wherein the second trench is above the first trench and extends laterally therefrom. The polymer is removed from the first trench. A capacitor is formed within the first and the second trenches.
申请公布号 US2009166701(A1) 申请公布日期 2009.07.02
申请号 US20070006061 申请日期 2007.12.28
申请人 DOYLE BRIAN S;SOMASEKHAR DINESH;CHAU ROBERT S 发明人 DOYLE BRIAN S.;SOMASEKHAR DINESH;CHAU ROBERT S.
分类号 H01L27/108;H01L21/8248 主分类号 H01L27/108
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