发明名称 METHOD FOR FORMING METAL INTERCONNECTION LAYER OF SENICONDUCTOR DEVICE
摘要 A metal wiring forming method of semiconductor device is provided to suppress the void generation by etching the photoresist after reflowing. A barrier layer, a metal layer(202), and a capping layer(204) are successively evaporated on a semiconductor substrate. The photoresist is evaporated on the upper part of the capping layer. After the evaporated photoresist is reflowed, the swollen capping layer pattern of form is molded by performing the patterning. The etching to the metal layer is performed. The gap fill process of the inter-layer insulating layer is performed. The thickness of the evaporated capping metal is 650Å~700Å.
申请公布号 KR20090071770(A) 申请公布日期 2009.07.02
申请号 KR20070139654 申请日期 2007.12.28
申请人 DONGBU HITEK CO., LTD. 发明人 HONG, JI HOON
分类号 H01L21/28 主分类号 H01L21/28
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