发明名称 PRINT WIRING PATTERN GENERATION METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a print wiring pattern generation method capable of facilitating a pattern design by preventing an electronic component from being positional-deviated when mounting the component. <P>SOLUTION: In the print wiring pattern generation method, the area of a lead wiring pattern in the neighborhood of a first land pattern 4 corresponding to the first electrode of a chip capacitor pattern 1 is compared with the area of a lead wiring pattern in the neighborhood of a second land pattern 5 corresponding to the second electrode of the chip capacitor pattern 1. When the area rate is beyond a prescribed range, it is judged that a heat countermeasure for the lead wiring pattern is necessary, then the area of the lead wiring pattern whose area is larger is reduced to make it the same as the area of the lead wiring pattern whose area is smaller. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009145928(A) 申请公布日期 2009.07.02
申请号 JP20070319293 申请日期 2007.12.11
申请人 OMRON CORP 发明人 HARA MASAHIKO;IZUMI KAORU;NISHIMURA HISASHI;KITAGAWA SHOZO
分类号 G06F17/50;H05K3/00;H05K3/34 主分类号 G06F17/50
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