发明名称 |
Ultra low voltage, low leakage, high density, variation tolerant memory bit cells |
摘要 |
Methods and apparatus to provide ultra low voltage, low leakage, high density, and/or variation tolerant memory bit cells are described. In one embodiment, each of the cross-coupled invertors of a memory cell may include a plurality of p-channel transistors. Other embodiments are also described.
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申请公布号 |
US2009168509(A1) |
申请公布日期 |
2009.07.02 |
申请号 |
US20070006288 |
申请日期 |
2007.12.31 |
申请人 |
WIJERATNE SAPUMAL;ERNEST MATTHEW W;KUNS BRIAN A |
发明人 |
WIJERATNE SAPUMAL;ERNEST MATTHEW W.;KUNS BRIAN A. |
分类号 |
G11C11/40 |
主分类号 |
G11C11/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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