发明名称 USB BRIDGE
摘要 <p>A bridge circuit 10 is provided between first data port A1, A2 and second data port B1, B2. The bridge circuit comprises a first transceiver stage 40 comprising at least one input buffer 11, 14 and at least one tri-state output buffer 12, 13 linked to the first data port, a second transceiver stage 50 comprising at least one input buffer 21, 24 and at least one tri-state output buffer 12, 13 linked to the second data port, a first detection circuit 31 for detecting the arrival of a packet by the first data port, a second detection circuit 37 for detecting the arrival of a packet by the second data port. A selection circuitry 34, 35 enables the output of tri-state output buffer of the first or of the second transceiver stage depending of the detection made by the first and second detection circuits.</p>
申请公布号 WO2009081232(A1) 申请公布日期 2009.07.02
申请号 WO2007IB04445 申请日期 2007.12.21
申请人 GEMALTO SA;INVIA;LEYDIER, ROBERT;P0MET, ALAIN;DUVAL, BENJAMIN 发明人 LEYDIER, ROBERT;P0MET, ALAIN;DUVAL, BENJAMIN
分类号 G06F13/40 主分类号 G06F13/40
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