发明名称 SYSTEM AND METHOD FOR MEMORY PHASE SHEDDING
摘要 Embodiments of the invention supply power to DRAM or other memory devices with a multi-phase voltage regulator. A power controller coupled to the multi-phase voltage regulator causes one or more phases of the multi-phase voltage regulator to be activated or deactivated (shed) according to predetermined criteria. Embodiments of the invention thus improve power management by providing one or more reduced power states for the memory devices. Other embodiments are described.
申请公布号 US2009172442(A1) 申请公布日期 2009.07.02
申请号 US20070968142 申请日期 2007.12.31
申请人 ALEXANDER JAMES W;STANFORD EDWARD R;BODAS DEVADATTA V;DAVID HOWARD;LAM SON H 发明人 ALEXANDER JAMES W.;STANFORD EDWARD R.;BODAS DEVADATTA V.;DAVID HOWARD;LAM SON H.
分类号 G06F1/00 主分类号 G06F1/00
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