| 摘要 |
PROBLEM TO BE SOLVED: To measure a change in speed relative to a power source voltage in a critical path. SOLUTION: Between a first logical circuit (LOGIC1) and a second logical circuit (LOGIC2), a speed performance measurement circuit (SEQ1) that allows speed performance measurement is provided. The speed performance measurement circuit comprises a first flip flop (FF1) for storing first data, a first delay circuit (DELAY1) which delays the first data to generate second data, and a second flip flop (FF2) for storing the second data. The speed performance measurement circuit further comprises a first comparison circuit (EXOR1) which compares an output of the first flip flop with that of the second flip flop, and a third flip flop (FF3) which stores the output data of the first comparison circuit according to the timing of a first clock signal. The data of normal path and the path delayed for a certain time are compared with each other for measuring speed, and based on that, the power source voltage of a circuit is determined. COPYRIGHT: (C)2009,JPO&INPIT
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