发明名称 |
INTEGRATED CIRCUIT AND MANUFACTURING PROCESS FACILITATING SELECTIVE CONFIGURATION FOR ELECTROMAGNETIC COMPATIBILITY |
摘要 |
An integrated circuit (IC) having a selectively-designated electromagnetic compatibility (EMC) performance characteristic. The IC includes an IC die having an input or output (I/O) node. A first I/O cell of a first type associated with the I/O node provides a first EMC performance characteristic, and a second I/O cell of a second type associated with the I/O node provides a second EMC performance characteristic different from the first EMC performance characteristic. A first bonding pad is electrically coupled with the first I/O cell, and a second bonding pad is electrically coupled with the second I/O cell. The IC die can be packaged into a packaged IC having an I/O pin corresponding to the I/O node. The I/O pin is wired to one of either the first bonding pad or the second bonding pad, but not to the other, such that a pinout for the I/O node is preferentially provided having one of either the first EMC performance characteristic or the second EMC performance characteristic.
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申请公布号 |
US2009166679(A1) |
申请公布日期 |
2009.07.02 |
申请号 |
US20070967880 |
申请日期 |
2007.12.31 |
申请人 |
PATERNOSTER PAUL;SABHARANJAK VAIBHAVI;LAI PO-SHEN |
发明人 |
PATERNOSTER PAUL;SABHARANJAK VAIBHAVI;LAI PO-SHEN |
分类号 |
H01L27/10;G03F1/00;H01L21/60 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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