发明名称 DATA PROCESSING APPARATUS AND METHOD, AND PROGRAM
摘要 In order to correctly perform error analysis, test, or the like, a 64B/66B converter of a PCS processing unit of a transmitter conforming to 10 GBASE-R PHY performs 64B/66B conversion on data on a block basis that is transmitted over four lanes, the block being formed of two columns. In the conversion, when a control signal inputted via a control signal input terminal indicates a normal operation mode, if an error code in a block to be converted is detected by an error detector, error expansion that replaces all 8 bytes of data in the block with an error code /E/ is performed. In contrast, when the control signal indicates an analysis mode, the error expansion is not performed even if an error code is detected by the error detector.
申请公布号 US2009172494(A1) 申请公布日期 2009.07.02
申请号 US20080343667 申请日期 2008.12.24
申请人 NEC ELECTRONICS CORPORATION 发明人 IIMA TOMOFUMI
分类号 H03M13/05;G06F11/07 主分类号 H03M13/05
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