发明名称 RECEIVER OF SEMICONDUCTOR MEMORY APPARATUS
摘要 A data input circuit is provided to prevent malfunction of a data amplifying part due to PVT(Process, Voltage, Temperature) change by controlling an electric potential of a source of a transistor of the data amplifying part through a data amplifying control part. A digital-to-analog converting part(100) generates a first converting signal(V+) and a second converting signal(V-) having an electric potential of an analog level in response to an external control signal of a digital level. A data amplifying part(220) is activated in response to a clock(clk) and a power-up signal(pwdnb). The data amplifying part compares a first data with a second data, and generates a first sense amplifier output signal(SA-outp) and a second sense amplifier output signal(SA-outn). A data amplifying control part(210) is activated in response to the clock and the power-up signal. The data amplifying control part controls the data amplifying part in response to the first converting signal and the second converting signal.
申请公布号 KR20090070317(A) 申请公布日期 2009.07.01
申请号 KR20070138289 申请日期 2007.12.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HWANG, TAE JIN;PARK, KUN WOO;KIM, YONG JU;SONG, HEE WOONG;OH, IC SU;KIM, HYUNG SOO;CHOI, HAE RANG;LEE, JI WANG
分类号 G11C7/10;G11C7/06;G11C7/08 主分类号 G11C7/10
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