发明名称 METHOD OF FABRICATING A SOLDER ON PAD FOR CORELESS PACKAGE SUBSTRATE TECHNOLOGY
摘要 A method for manufacturing a solder on pad by a coreless package substrate method is provided to prevent an electrical short in a flip chip coupling process by forming a copper core inside the solder on pad. A substrate pad(295) and a solder on pad are formed for mounting a semiconductor die with a flip chip method. A pattern is etched and formed in a dry film. An uneven part is formed in a surface of a first copper foil by half-etching a surface of the first copper foil exposed according to the dry film pattern. A solder(265) plating is formed on the uneven surface of the first copper foil with the uneven part. The copper plating is filled in the solder plating coated on the surface of the uneven part by performing the copper plating. The dry film is peeled off and the surface is grinded and planarized.
申请公布号 KR20090070649(A) 申请公布日期 2009.07.01
申请号 KR20070138735 申请日期 2007.12.27
申请人 DAE DUCK ELECTRONICS CO., LTD. 发明人 CHO, WON JIN;YOON, SANG KOWN
分类号 H01L23/488;H01L21/60 主分类号 H01L23/488
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