发明名称 Video data processor and data bus management method thereof
摘要 <p>In a video data processor (100), the control unit (104) cyclically defines a plurality of slots to the data bus (101), sets band width of each slot to be band width capable of transmitting the video data without missing frames, and assigns the video data to the slots. Only the video data of slots assigned by a bus arbiter (103) may be received transmission permission in a round-robin system, then, the video data of the slots is transmitted to the data bus (101). Thereby, the band of the data bus (101) may be efficiently used without affecting on transmission of video data of which the transmission speed should be kept constant.</p>
申请公布号 EP2075709(A2) 申请公布日期 2009.07.01
申请号 EP20080016262 申请日期 2008.09.16
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SATOH, NAOKO;YAMAGUCHI, SHUICHI;OSAKI, YOSHIRO;HOSHINO, KOUJI
分类号 G06F13/42 主分类号 G06F13/42
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