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发明名称
Rapid reconfiguration of a logic circuit by the use of parallel configuration data transfer paths
摘要
申请公布号
GB2455907(A)
申请公布日期
2009.07.01
申请号
GB20080023152
申请日期
2008.12.18
申请人
PANASONIC CORPORATION
发明人
YUKIHIRO SASAGAWA
分类号
H03K19/177
主分类号
H03K19/177
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