发明名称
摘要 A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a plurality of bus masters coupled to a shared bus. A bus arbiter is provided for arbitrating between requests to access the bus by a first bus master and one or more other bus masters. Accesses by the one or more other bus masters to the bus are restricted in response to a signal indicative of a change in a mode of operation of the RF circuit. In one particular implementation, a communication apparatus employs time domain isolation wherein the digital processing circuit may be placed in a shutdown mode when the radio frequency circuit is active.
申请公布号 JP4287489(B2) 申请公布日期 2009.07.01
申请号 JP20070506502 申请日期 2005.03.31
申请人 发明人
分类号 H04B1/40;G06F13/366;H04B1/16;H04W52/02 主分类号 H04B1/40
代理机构 代理人
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