METHOD FOR FORMING OVERLAY VERNIER

摘要

A method for forming overlay vernier is provided to digitize mis-align among main patterns positioned around a mother and son vernier by checking the alignment state of a mother and son vernier. A formation method of an overlay vernier comprises a formation step of a first mask material layer, a formation step of a first vernier pattern(216), and a formation step of the spacer material layer. The formation step of the first mask material layer is performed to form a first mask material layer on the phase of the semiconductor substrate(210). The first vernier pattern formation step transcribes the vernier pattern to the first mask material layer to form the formation step of the first vernier pattern. The first vernier pattern has a hole pattern. The formation step of the spacer material layer is performed in order to form the spacer material layer on the first vernier pattern. The spacer material layer is formed to be conformal to cover the hole patterns in the first vernier pattern. The formation method of the overlay vernier includes the formation method of the second mask material layer, the formation step of the second mask pattern(220a), and the formation step of space pattern(218a). The formation method of the second mask material layer is performed to form the second mask material layer on the spacer material layer. The formation step of the second mask pattern is performed to etch back the second mask material layer and to form second mask patterns on the hole patterns of the first vernier pattern. The second mask patterns are formed in order to expose the spacer material layer. The space patterns are formed under the second mask patterns. The space patterns comprise the second overlay vernier pattern(222) with second mask patterns.