| 摘要 |
A test pattern of a semiconductor device and a manufacturing method thereof are provided to form contact holes of different depth levels by forming a lower conductive layer having different steps. A first region(12) and a second region(13) are defined on a semiconductor substrate(11). The second region has a trench structure. A lower conductor layer(14) formed on the first region is isolated from the lower conductor layer formed on the second region. An interlayer dielectric(15) is formed on an entire surface of the substrate. A contact plug(16) is formed on the interlayer dielectric of both sides of each lower conductor layer in order to be electrically connected with each lower conductor layer. An upper conductor layer(17) is formed on the interlayer dielectric in order to connect electrically each lower conductor layer through the contact plug. |
