摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device which reduces capacitance between wiring in each wiring layer having a narrow wiring width and prevents separation between layers in each wiring layer having a wide wiring width, and therefore the assembling yield of which is improved. SOLUTION: The semiconductor device includes the multilayer wiring of a dual damascene structure. The multilayer wiring includes a first wiring layer 151 formed on a semiconductor substrate and a second wiring layer 153 formed on the first wiring layer. In the first wiring layer 151, the aspect ratio L of a wiring having the minimum wiring width and the via aspect ratio V are in a relationship of L≥V, and in the second wiring layer 153, the aspect ratio L of a wiring having the minimum wiring width and the via aspect ratio V are in a relationship of L<V. COPYRIGHT: (C)2009,JPO&INPIT
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