发明名称 Semiconductor package with leads on a chip having multi-row of bonding pads
摘要 A LOC leadframe-based semiconductor package includes a chip with multiple rows of bonding pads. At least a bus bar is attached to the chip and is disposed between a first row of bonding pads and the fingers of the leads. A plurality of bonding wires electrically connect the first row of bonding pads to the fingers of the leads. The portion of the bus bar attached to the active surface of the chip includes a bent section bent away from the fingers. A long bonding wire electrically connects one of a second row of bonding pads to one of the fingers of the leads by overpassing the bent section. Therefore, the distance between the long bonding wire and the bus bar is increased to avoid electrical short between the long bonding wire and the bus bar and to enhance the quality of electrical connections of the LOC semiconductor package.
申请公布号 US2009160038(A1) 申请公布日期 2009.06.25
申请号 US20080068613 申请日期 2008.02.08
申请人 POWERTECH TECHNOLOGY INC. 发明人 FAN WEN-JENG;HSU YU-MEI
分类号 H01L23/495 主分类号 H01L23/495
代理机构 代理人
主权项
地址