发明名称 METHOD FOR PERFORMING PATTERN DECOMPOSITION FOR FULL CHIP DESIGN
摘要 <P>PROBLEM TO BE SOLVED: To provide a method for decomposing a target pattern to be printed on a wafer into multiple patterns upon using double patterning techniques. <P>SOLUTION: The method includes: a step 25 of, after segmenting the target pattern into a plurality of patches and identifying critical features within each patch which violate minimum spacing requirements, generating a critical group graph for each of the plurality of patches having critical features; a step 26 of allowing the critical group graph of a given patch to assign colors of the critical features within the given patch; a step 27 of coloring/splitting non-critical features; and a step 28 of stitching and performing OPC on the two (or more) layers generated by the decomposition process. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009139938(A) 申请公布日期 2009.06.25
申请号 JP20080285523 申请日期 2008.11.06
申请人 BRION TECHNOLOGIES INC;ASML NETHERLANDS BV 发明人 LUOQI CHEN;HONG CHEN;LI JIANGWEI;ROBERT JOHN SOCHA
分类号 G03F1/08 主分类号 G03F1/08
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