| 摘要 |
PROBLEM TO BE SOLVED: To provide a data transmission circuit in which a calculation of a delay time during transmission of data is simplified while preventing conflict of buses. SOLUTION: Processor elements (PEs) 12A-F mutually transmit and receive data through a plurality of pieces of wiring 13 connected through data input units 14A-F or switch units 15A-H. Output terminals of the PEs 12A-F and the wiring 13 are connected through the data input units 14A-F composed of multiplexers (or data input units composed of logical gates). There occurs thereby no conflict of the buses due to erroneous inputs of voltages from the output terminals of the PEs 12A-F. Since the plurality of pieces of wiring 13 are connected to the switch units 15A-H composed of the multiplexers (or to switch units 15A-H composed of the logical gates), the calculation of the delay time during the transmission of the data is simplified. COPYRIGHT: (C)2009,JPO&INPIT
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