| 摘要 |
A radio receiver includes a frequency converter, an oscillation circuit, an A/D converter, and a digital demodulator. The A/D converter digitally samples the intermediate frequency signal by using one of an oscillating frequency, a multiplying frequency, and a dividing frequency of the clock signal as a sampling frequency. The digital demodulator performs a digital demodulation processing by using the intermediate frequency signal digitally sampled and by using the one of the oscillating frequency, the multiplying frequency, and the dividing frequency of the clock signal as an operating frequency. The oscillating frequency is within a predetermined range. The predetermined range is at least one of equal to or more than 37.1 MHz and less than or equal to 37.9 MHz, equal to or more than 54.1 MHz and less than or equal to 64.8 MHz, and equal to or more than 74.2 MHz and less than or equal to 75.8 MHz.
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