发明名称
摘要 <p>A method and apparatus to improve the contact formation of salicide and reduce the external resistance of a transistor is disclosed. A gate electrode is formed on a surface of a substrate. A source region and a drain region are isotropically etched in the substrate. A Silicon Germanium alloy is doped in situ with Boron in the source region and in the drain region. Silicon is deposited on the Silicon Germanium alloy. Nickel is deposited on the Silicon. A Nickel Silicon Germanium silicide layer is formed on the Silicon Germanium alloy. A Nickel Silicon silicide layer is formed on the Nickel Silicon Germanium silicide layer.</p>
申请公布号 JP2009524260(A) 申请公布日期 2009.06.25
申请号 JP20080551579 申请日期 2007.03.19
申请人 发明人
分类号 H01L21/336;H01L21/28;H01L21/8238;H01L27/092;H01L29/417;H01L29/78 主分类号 H01L21/336
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