发明名称 System and Method for Cache Line Replacement Selection in a Multiprocessor Environment
摘要 A method for managing a cache operates in a data processing system with a system memory and a plurality of processing units (PUs). A first PU determines that one of a plurality of cache lines in a first cache of the first PU must be replaced with a first data block, and determines whether the first data block is a victim cache line from another one of the plurality of PUs. In the event the first data block is not a victim cache line from another one of the plurality of PUs, the first cache does not contain a cache line in coherency state invalid, and the first cache contains a cache line in coherency state moved, the first PU selects a cache line in coherency state moved, stores the first data block in the selected cache line and updates the coherency state of the first data block.
申请公布号 US2009164736(A1) 申请公布日期 2009.06.25
申请号 US20070959804 申请日期 2007.12.19
申请人 DORSEY ROBERT JOHN;COX JASON ALAN;LE HIEN MINH;NICHOLAS RICHARD;ROBINSON ERIC FRANCIS;TRUONG THUONG QUANG 发明人 DORSEY ROBERT JOHN;COX JASON ALAN;LE HIEN MINH;NICHOLAS RICHARD;ROBINSON ERIC FRANCIS;TRUONG THUONG QUANG
分类号 G06F12/08 主分类号 G06F12/08
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