SRAM CELL CIRCUIT AND METHOD FOR DRIVING THE SAME

摘要

There is provided a SRAM circuit in which restrictions on transistor sizes occurring when ensuring a write operation and a read operation are controlled, the number of transistors in use is reduced, and use of a dedicated read line is eliminated. In the SRAM circuit, to configure a positive feedback circuit, the output node (Q202) of a first inverter (202) is connected to the input node (I204) of a second inverter (204) and a feedback control transistor (220) connects between the output node (Q204) of the second inverter (204) and the input node (I202) of the first inverter (202). After bringing the feedback control transistor (220) into a non-conduction state to disconnect the positive feedback circuit, either a write control transistor (222) or a read control transistor (224) is brought into a conduction state, thereby bringing the SRAM circuit into a write state or a read state.