发明名称 METHOD FOR FABRICATING NON-VOLATILE MEMORY DEVICE HAVING CHARGE TRAPPING LAYER
摘要 <p>A method for manufacturing a non-volatile memory device is provided to reduce a threshold voltage and prevent generation of a failure by moving electric charges trapped at an electric charge trapping layer into neighboring cells during a read process after programming. A gate insulating layer(102) and a conductive layer(104) are formed on a semiconductor substrate(100) in which a cell region and a peripheral circuit region are defined. The conductive layer and the gate insulating layer in the cell region are etched. A tunneling layer(110) and an electric charge trapping layer(120) are formed on a resultant structure. A hard mask layer is formed on the resultant structure on which the electric charge trapping layer is formed. A trench is formed in the semiconductor substrate of the cell region and the peripheral circuit region by using the hard mask layer. The trench is buried by an insulating film and thus a device isolation film is formed. The hard mask layer is removed and the device isolation film in the cell region is etched at a constant thickness. A shielding layer(150) and a control gate electrode(160) are formed on the resultant structure.</p>
申请公布号 KR20090068013(A) 申请公布日期 2009.06.25
申请号 KR20070135864 申请日期 2007.12.21
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, SUK GOO;OM, JAE CHUL;LEE, SANG BUM
分类号 H01L21/8247;H01L27/115 主分类号 H01L21/8247
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