发明名称 MARK FOR MEASURING OVERLAY AND METHOD FOR FORMING THE SAME
摘要 <p>An overlay measurement mark and a forming method thereof are provided to enhance a yield of a device by preventing an overlay measurement error due to a reverse micro-loading effect in a lithography process. An overlay measurement mark is formed by arraying a plurality of fine patterns(201) in four bars. The fine patterns are formed as depressed patterns or embossed patterns according to types of patterns formed within a device region(DIE). The width(W2) of the fine pattern is 100-120% of a width(W1) of a contact hole formed within the device region. The interval(L2) between the fine patterns is 100-120% of the interval(L1) between the contact holes formed within the device region. The overlay measurement mark is formed in a scribe lane region in order to measure an overlay between patterns(202) formed in the device region. The size of the fine patterns are 100-120% of the size of the patterns formed in the device region.</p>
申请公布号 KR20090067604(A) 申请公布日期 2009.06.25
申请号 KR20070135316 申请日期 2007.12.21
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, IK SOO;CHO, YONG TAE;LEE, SANG DO;OH, SANG ROK
分类号 H01L21/027 主分类号 H01L21/027
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