发明名称
摘要 A method of fabricating an electrode structure for a multilayer semiconductor device comprising a semiconductor layer having a first electrode layer in contact therewith and a second electrode layer separated there-from by a dielectric layer (8), the method comprising the steps of; applying a patterning material (20) only to selected areas of a support layer within the device so as to define the arrangement of the first electrode layer thereon; applying to the support layer a catalyst (24) adapted to be responsive to the patterning material (20); applying a conductive material (26) to the support layer so as to form the first electrode layer thereon; wherein the support layer, the patterning material (20) and the catalyst (24) cooperate such that the conductive material (26) is only deposited on the selected areas of the support layer to which the catalyst (24) has been applied. An thin film transistor (2) having a gate insulator layer (8) comprising an epoxide material.
申请公布号 JP2009524231(A) 申请公布日期 2009.06.25
申请号 JP20080550830 申请日期 2007.01.12
申请人 发明人
分类号 H01L21/336;H01L21/28;H01L21/288;H01L21/3205;H01L29/786;H01L51/05 主分类号 H01L21/336
代理机构 代理人
主权项
地址