发明名称 System and Method for Cache Coherency In A Multiprocessor System
摘要 A method for maintaining cache coherency operates in a data processing system with a system memory and a plurality of processing units (PUs), each PU having a cache, and each PU coupled to at least another one of the plurality of PUs. A first PU receives a first data block for storage in a first cache of the first PU. The first PU stores the first data block in the first cache. The first PU assigns a first coherency state and a first tag to the first data block, wherein the first coherency state is one of a plurality of coherency states that indicate whether the first PU has accessed the first data block. The plurality of coherency states further indicate whether, in the event the first PU has not accessed the first data block, the first PU received the first data block from a neighboring PU.
申请公布号 US2009164735(A1) 申请公布日期 2009.06.25
申请号 US20070959793 申请日期 2007.12.19
申请人 NICHOLAS RICHARD;COX JASON ALAN;DORSEY ROBERT JOHN;LE HIEN MINH;ROBINSON ERIC FRANCIS;TRUONG THUONG QUANG 发明人 NICHOLAS RICHARD;COX JASON ALAN;DORSEY ROBERT JOHN;LE HIEN MINH;ROBINSON ERIC FRANCIS;TRUONG THUONG QUANG
分类号 G06F12/00 主分类号 G06F12/00
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