| 摘要 |
A method of fabricating a semiconductor device including a metal gate electrode and an electronic fuse. The method may include forming a gate dielectric layer on a semiconductor substrate, forming a first metal layer on the gate dielectric layer, forming a portion of the first metal layer in a first device region, forming a second metal layer on the semiconductor substrate comprising the portion of the first metal layer, forming a portion of the second metal layer in a second device region, forming a low-resistance layer on the semiconductor substrate comprising the portion of the first metal layer and the portion of the second metal layer, and patterning the low-resistance layer to form gate electrodes, and a fuse pattern of the low-resistance layer in a fuse region.
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