SEMICONDUCTOR MEMORY DEVICE

摘要

A semiconductor memory device is provided to reduce currents consumed in a data clock transmission path, thereby minimizing size of jitter generated from a data clock. A clock input unit(200) comprises as follows. A clock buffering unit stores source clocks received through clock input pads. An internal clock generator generates internal clocks having the same frequency and the same phase as the source clocks in response to an output clock of the clock buffering unit. A clock driving unit drives the internal clock to each of clock transmission lines. Plural clock amplification units amplify clocks on each clock transmission line in response to a column enable signal. A data input/output unit inputs and outputs a lot of data in response to output clocks of each of the clock amplification units.