发明名称 FOLDING CIRCUIT AND ANALOG-TO-DIGITAL CONVERTER
摘要 A folding circuit and an analog-to-digital converter wherein the response to small signals is improved, the load on clock signals can be reduced and the increase of circuit area can be prevented. There are included a reference voltage generating circuit that generates a plurality of different voltages as reference voltages; and a plurality of amplifying circuits that convert difference voltages between the plurality of reference voltages and an analog input voltage to difference currents and output these difference currents. The output terminals of the amplifying circuits are alternately connected. Each of the amplifying circuits comprises a differential amplifier circuit having cascode output transistors (145,146). A switch (144), which is turned on in synchronism with a control clock, is connected between the sources of the cascode output transistors (145,146).
申请公布号 KR20090066269(A) 申请公布日期 2009.06.23
申请号 KR20097004486 申请日期 2009.03.03
申请人 SONY CORPORATION 发明人 OHKAWA TAKESHI;ONO KOICHI;MATSUURA KOUJI;YAMASITA YUKITOSI;TOYOMURA JUNJI;NAKAMURA SHOGO;KANAGAWA NORIFUMI
分类号 H03M1/36;H03M1/14 主分类号 H03M1/36
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