发明名称 Stress engineering using dual pad nitride with selective SOI device architecture
摘要 A method for engineering stress in the channels of MOS transistors of different conductivity using highly stressed nitride films in combination with selective semiconductor-on-insulator (SOI) device architecture is described. A method of using compressive and tensile nitride films in the shallow trench isolation (STI) process is described. High values of stress are achieved when the method is applied to a selective SOI architecture.
申请公布号 US7550364(B2) 申请公布日期 2009.06.23
申请号 US20070668790 申请日期 2007.01.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHIDAMBARRAO DURESETI;HENSON WILLIAM K.;RIM KERN;WILLE WILLIAM C.
分类号 H01L21/76 主分类号 H01L21/76
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