发明名称 |
METHOD FOR FABRICATING VIA HOLE USING RIE |
摘要 |
A method for forming a via hole using a reactive ion etch method is provided to improve reliability of electrical connection by forming an anisotropic via hole having a vertical wall surface. An insulating layer is formed on an upper part of a substrate. A mask having a through-hole of a via forming pattern is formed on the upper part of the substrate. The substrate including the mask is loaded between an upper electrode and a lower electrode of a vacuum chamber. A via hole is formed by performing a RIE(Reaction Ion Etching) process within the chamber. A plasma discharge process is performed within the chamber by injecting reactive gas into the inside of the vacuum chamber. A radical of an electron particle type is formed by performing the plasma discharge process. The radical is accelerated from the upper electrode to the lower electrode.
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申请公布号 |
KR20090065911(A) |
申请公布日期 |
2009.06.23 |
申请号 |
KR20070133455 |
申请日期 |
2007.12.18 |
申请人 |
SAMSUNG ELECTRO-MECHANICS CO., LTD. |
发明人 |
PARK, JONG WON |
分类号 |
H05K3/40;C23C18/00 |
主分类号 |
H05K3/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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