发明名称 HYBRID MICROPROCESSOR
摘要 FIELD: information technology. ^ SUBSTANCE: present invention relates to computer engineering and can be used in signal processing systems. The device contains an instruction buffer, memory control unit, second level cache memory, integral arithmetic-logic unit (ALU), floating point arithmetic unit and a system controller. ^ EFFECT: more functional capabilities of the device due to processing signals and images when working with floating point arithmetic. ^ 4 cl, 4 dwg
申请公布号 RU2359315(C2) 申请公布日期 2009.06.20
申请号 RU20070116220 申请日期 2007.04.28
申请人 UCHREZHDENIE ROSSIJSKOJ AKADEMII NAUK NAUCHNO-ISSLEDOVATEL'SKIJ INSTITUT SISTEMNYKH ISSLEDOVANIJ RAN (NIISI RAN) 发明人 BOBKOV SERGEJ GENNADIEVICH;ARJASHEV SERGEJ IVANOVICH;BARSKIKH MIKHAIL EVGEN'EVICH;BYCHKOV KONSTANTIN SERGEEVICH;ZUBKOVSKIJ PAVEL SERGEEVICH
分类号 G06F7/483;G06F7/57;G06F9/30 主分类号 G06F7/483
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