发明名称 Integrated circuits and methods to compensate for defective memory in multiple layers of memory
摘要 Embodiments of the invention relate generally to data storage and computer memory, and more particularly, to systems, integrated circuits and methods to compensate for defective memory in third dimension memory technology. In a specific embodiment, an integrated circuit is configured to compensate for defective memory cells. For example, the integrated circuit can include a memory having memory cells that are disposed in multiple layers of memory. It can also include a memory reclamation circuit configured to substitute a subset of the memory cells for one or more defective memory cells. At least one memory cell in the subset of the memory cells resides in a different plane in the memory than at least one of the one or more defective memory cells.
申请公布号 US2009147598(A1) 申请公布日期 2009.06.11
申请号 US20070001335 申请日期 2007.12.10
申请人 UNITY SEMICONDUCTOR CORPORATION 发明人 NORMAN ROBERT
分类号 G11C29/00 主分类号 G11C29/00
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