发明名称 METHOD FOR DESIGNING SEMICONDUCTOR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a method for extracting roughness scattering element parameter on plural gate interfaces related with the mobility of plural gate transistors, and for mounting it on a circuit simulator. SOLUTION: The capacity-gate voltage characteristics of a field-effect transistor having plural gates are measured against a voltage change in each one of the gates for an inverted MOSFET and for an accumulated MOSFET, respectively. These measurements together with numerical simulations provided from a model for quantum effects are used to determine flat band voltages between the plural gates and a channel. Next, an effective normal electric field is calculated as a vector line integral by using a set of flat band voltages for the measured capacity as a lower integration limit. Lastly, mobility depending on the effective normal electric field is calculated from current-gate voltage characteristic measurements and capacity measurements in a source-drain path, and the calculated mobility is substituted into an equation for a current-voltage curve between source and drain. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009129043(A) 申请公布日期 2009.06.11
申请号 JP20070301276 申请日期 2007.11.21
申请人 HITACHI LTD 发明人 YOSHIMOTO HIROYUKI;SUGII NOBUYUKI;SAITO SHINICHI;HISAMOTO MASARU
分类号 G06F17/50;H01L21/336;H01L21/82;H01L29/78;H01L29/786 主分类号 G06F17/50
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