发明名称 DEVICE AND PIXEL ARCHITECTURE FOR HIGH RESOLUTION DIGITAL IMAGING
摘要 The present invention discloses structure of a two-gate field effect transistor (FET), named as charge gated FET, and presents various active pixel sensor (APS) and multimode architectures using the device which has only one, or two on-pixel transistors for high resolution, high gain and fast frame rate APS arrays. It is also disclosed a new method of addressing pixels of an APS array by applying the addressing voltage pulse directly to the gate of the amplifying transistor of the pixel architecture, eliminating the row select transistor from the pixel circuit.
申请公布号 US2009147118(A1) 申请公布日期 2009.06.11
申请号 US20080207871 申请日期 2008.09.10
申请人 KARIM KARIM SALLAUDIN;TAGHIBAKHSH FARHAD 发明人 KARIM KARIM SALLAUDIN;TAGHIBAKHSH FARHAD
分类号 H04N5/335;H04N5/374;H04N5/3745 主分类号 H04N5/335
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