| 摘要 |
An input voltage signal VIN to be inputted to a gate terminal of a PMOS transistor M1 is converted to a voltage value which was level shifted at the source terminal by an inter-terminal voltage between the gate and source of the PMOS transistor M1. This conversion is carried out in accordance with a bias current I1 flowing from the constant current source IS through the source terminal of the PMOS transistor M1. The voltage thus converted is outputted from a source follower circuit through a capacitative element C1. A low-pass filter is constituted of the impedance of the PMOS transistor M1 and the capacitative element C1 in a signal path extending from the input voltage signal VIN to the source follower circuit.
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