| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clock recovery circuit capable of effectively suppressing the generation of unwanted components upon switching a clock signal. <P>SOLUTION: This clock recovery circuit includes: a pre-stage selection circuit group 14 which comprises a first half selection circuit which sorts a selection clock signal of a different phase into a plurality of selection clock signal groups to output one of the selection clock signals as a pre-stage output clock signal according to a pre-stage selection control signal, for each selection clock signal group; a post-stage selection circuit 15 for outputting one of the pre-stage output clock signals as a regenerative clock signal RCLK according to a post-stage selection control signal; a phase control circuit 11 for outputting a phase control signal based on a phase difference between receiving data and the regenerative clock signal RCLK; a pre-stage selection control circuit 12 for outputting the pre-stage selection control signal which selects the selection clock signal specified by the phase control signal; and a post-stage selection control circuit 13 for outputting the post-stage selection control signal during a period when a theoretical value of a present pre-stage output clock signal is identical to that of a new pre-stage output clock signal when a switching is required. <P>COPYRIGHT: (C)2009,JPO&INPIT |
