发明名称 MULTIPLE POWER SOURCE INTERFACE CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, ELECTRIC CIRCUIT SUBSTRATE, AND BATTERY POWERED EQUIPMENT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a multiple power source interface circuit capable of preventing the occurrence of through current at the time of input/output power supply shut-down and allowing an LSI (large scale integrated circuit) to operate with low power consumption, while suppressing increase in the number of circuits. <P>SOLUTION: An input control gate 106 controls whether an input signal is transmitted or not, according to an input control signal. A level shifter 107 converts an output signal of the input control gate 106 into the voltage level of an internal power source, when the input control signal shows input permission. On the other hand, when the input control signal shows input prohibition, the level shifter 107 does not perform conversion operation but outputs a signal of a predetermined level. That is, the input control signal serves as a function of a control signal to permit or prohibit operation of the level shifter. When terminal power source is shut down, through current to be occurred at the internal power source in the level shifter can be suppressed by establishing the input control signal as input prohibition. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009130490(A) 申请公布日期 2009.06.11
申请号 JP20070301360 申请日期 2007.11.21
申请人 PANASONIC CORP 发明人 UENISHI TSUNEO
分类号 H03K19/00;G06F1/32 主分类号 H03K19/00
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