| 摘要 |
The invention relates to a semiconductor arrangement, comprising a first depletion layer field effect transistor and a second first depletion layer field effect transistor, wherein each depletion layer field effect transistor comprises a semiconductor body (116) of the one conductor type, which is in contact with a source electrode (S1; S2) and a drain electrode (D) spaced from the same such that between the source electrode and the drain electrode a flow path in created in the semiconductor body, and zones (117, 139, 122; 140, 128, 124) of the other conductor type that is opposite from the one conductor type, wherein the zones are provided in the region of the flow path in the semiconductor body and are in contact with a gate electrode (G1; G2) and form space charge regions controlling the flow path in the semiconductor body (116). The drain electrodes of the two depletion layer field effect transistors are short-circuited, and the source electrode (S1) of the first field effect transistor is short circuited with the gate electrode (G2) of the second depletion layer field effect transistor. The invention further relates to a circuit arrangement comprising this semiconductor arrangement, which has a switch element (104) that is controlled by the potential of the source electrode (S2) of the second depletion layer field effect transistor. The switch element can connect the gate electrode (G1) and the source electrode (S1) of the first depletion layer field effect transistor with a potential difference increasing the space charge regions. |
