| 摘要 |
A microprocessor including a random number generator (RNG) that performs a self-test on reset and selectively enables/disables itself based on the self-test results is disclosed. The RNG includes a self-test unit that performs the self-test to determine whether the RNG is functioning properly in response to either a power-up or warm reset. If the self-test fails, the microprocessor disables the RNG. Disabling the RNG may include returning extended function information indicating the RNG is not present in response to execution of a CPUID instruction. Disabling the RNG may include generating a general protection fault in response to execution of a RDMSR or WRMSR instruction specifying an MSR associated with the RNG. Disabling the RNG may include generating an invalid opcode fault in response to execution of an instruction that attempts to obtain random numbers from the RNG. In one embodiment, the self-test is specified by FIPS 140-2.
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