发明名称 TEST PATTERN FOR SEMICONDUCTOR DEVICE, METHOD FOR FACTURING THE PATTERN, AND METHOD FOR TESTING THE DEVICE
摘要 A test pattern for as semiconductor device, a method for manufacturing the pattern and testing the device are provided to cut down the time to be required to test by testing the fault of the contact connected to the gate, the source and drain region, and metal wiring simultaneously. A first contact is connected to source and drain region(380) formed in the active region. A second contact(332) is connected to the gate and is formed near the first contact. The first contact and the second contact form an alternative chain. A gate pattern(310) is formed between the source/drain pattern formed in active region. The first contact(330) and the second contact belonging to gate patterns(312) are arranged as the neighboring chain type belongs to active areas(382,384). The first contact and the second contact(322) are connected through the metal wiring(350).
申请公布号 KR20090058235(A) 申请公布日期 2009.06.09
申请号 KR20070124921 申请日期 2007.12.04
申请人 DONGBU HITEK CO., LTD. 发明人 HWANG, MUN SUB;PARK, HYUNG JIN
分类号 H01L21/66 主分类号 H01L21/66
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